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Creators/Authors contains: "Horro, Marcos"

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  1. ; ; ; (, Proceedings of the ACM/IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT'22))
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  2. ; ; ; (, 2022 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS))
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  3. ; ; ; ; (, IEEE Access)
  4. ; ; ; ; (, DAC '19: Proceedings of the 56th Annual Design Automation Conference 2019)
    Recent manycore processors are kept coherent using scalable distributed directories. A paramount example is the Xeon Phi Knights Landing. It features 38 tiles packed in a single die, organized into a 2D mesh. Before accessing remote data, tiles need to query the distributed directory. The effect of this coherence traffic is poorly understood. We show that the apparent UMA behavior results from the degradation of the peak performance. We develop ways to optimize the coherence traffic, the core-to-core-affinity, and the scheduling of a set of tasks on the mesh, leveraging the unique characteristics of processor units stemming from process variations. 
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